大算力自动驾驶芯片的「决赛」即将打响

The “finals” of the high computing power autonomous driving chip are about to begin. The Horizon Journey 5, the global and China’s first autonomous driving chip with 100 TOPS and entering the pre-installation mass production stage, has completed the final verification work and will officially begin mass production and installation in the fourth quarter of this year. “Leading the ‘World Cup’ of high computing power autonomous driving chips to lock in the final seat”. Who made it to the “finals”?

On June 30th, Horizon Robotics Technology Development Co., Ltd. (referred to as Horizon) held a technical communication meeting before the mass production of the Journey 5, a picture in a PPT of Mobileye, Qualcomm, NXP, HISilicon, and a series of well-known chip giants was shown. However, after a series of competitions such as AI computing power, safety and reliability, development environment, algorithm verification, and ecological support, only Nvidia and Horizon finally made it to the production finals.

As an industry with high technical threshold, high technical density, and high ecological barriers, advanced process chips such as Intel and Nvidia are all from the United States. How can a Chinese chip start-up enter the mass production stage with Nvidia? More importantly, why is the autonomous driving chip market, which has just been valued and is about to enter the peak duel between Nvidia and Horizon, seemingly closing the door on new entrants?

Technical thresholds for mass production of vehicle chips with 100 TOPS

Overnight, the computing power of consumer-grade chips, which was only tens of TOPS, is now worthless in front of autonomous driving. Single-chip computing power chips with more than 100 TOPS have become the basic hardware for autonomous driving.

“Currently, there is no end to the road of improving effective computing power.” Huang Chang, co-founder and CTO of Horizon, told EV-Observer that the basic computing power needs of the autonomous/intelligent driving industry are: L2 level needs about 10 TOPS; L2+ requires dozens of TOPS; L3 requires at least 100 TOPS; and L4 requires 1000 TOPS. “But personally, I think L2+ level needs at least 100 TOPS. With the increasing resolution of sensors, the amount of data to be processed per unit time continues to increase. Engineers need higher effective computing power to process the data to obtain better results. (To fully meet) the demand of L4 level, whether several thousand TOPS are needed (depends on whether the company) has budget support.”

This judgment has also been supported by practical applications.Xpeng Motors achieved urban NGP functionality on the P5 platform with only 30 TOPS (single chip) of the NVIDIA Xavier platform thanks to its algorithmic advantages. However, Wu Xinzhou, head of Xpeng’s smart driving R&D, mentioned in a recent demonstration video that the implementation of urban NGP functionality is still limited by chip performance and will be better served by the G9.

The brand-new flagship model G9 from Xpeng is equipped with dual NVIDIA Orin chips.

How to create AI chips with high computing power

The computing power of a single NVIDIA Orin and Journey 5 is 256 TOPS (trillions of calculations per second) and 128 TOPS, respectively. However, when using frame-per-second (FPS) as a benchmark, the performance gap between Orin and Journey 5 is quite different.

At a recent communication meeting, Horizon Robotics presented the latest test results: Journey 5 is three times faster (when processing a single frame input of a million pixel large image, processing a 512×512 pixel image using FCOS-EFFICIENTNET neural network), and twice faster (when processing a 704×1208 pixel image using EFFICIENTNET neural network) than NVIDIA Orin (based on estimation by Horizon Robotics based on NVIDIA’s published performance).

This means that for autonomous driving systems, it means that more can be “seen” in a shorter period of time. Therefore, FPS is considered an important indicator of chip performance in autonomous driving scenarios.

Moreover, after the hardware of Journey 5 was finalized, its performance continued to improve. “Due to changes in the software architecture, Journey 5’s FPS (under the same hardware and algorithmic conditions) increased from 1283 to 1580.” Huang Chang said in the introduction that Horizon Robotics’ chip design methodology based on hardware and software combination was the reason for this.

“Starting from the end application scenario” is the methodology that Horizon Robotics has been emphasizing. By completely starting from the autonomous driving scenario, benchmarking the algorithms used in autonomous driving, and adopting a combination of software (target algorithm) and hardware (chip architecture), Horizon Robotics has made a breakthrough and quickly cut into the production of high-performance AI chips for autonomous driving, which is why it is competing head-to-head with NVIDIA. (For more detailed technical principles, please read “Horizon Robotics Pursues NVIDIA“)

Mass production is not an easy task to accomplish overnight.

Like all large-scale projects, completing the “prototype” in the lab is only the first step. The more difficult part is the verification and testing for large-scale production.

At a press conference, Horizon unveiled the testing process and some testing scenarios for Journey 5 to the public for the first time.

Journey 5 is the first AI chip in China developed based on the ISO 26262 safety process and has been certified as an ISO 26262 ASIL-B functional safety product. It has undergone pre-silicon simulation environment testing, chip fabrication, post-silicon real environment testing, and finally, vehicle-level reliability testing, meeting the AEC-Q100 vehicle-level reliability requirements.

In fact, Journey 2 also underwent third-party testing and verification. However, starting with Journey 3, Horizon established a professional testing team for vehicle-level AI chips from scratch, synchronously establishing a rigorous quality management system and standard process, and delivering high-quality products during the mass production process of Journey 3.

Based on the experience of producing millions of vehicle-level chips in Journey 2 and Journey 3, Horizon has fully migrated its abundant know-how to the new generation of high-computing power chip, Journey 5.

Huang Chang told “Electric Vehicle Observer” that Journey 5’s verification testing took a year and cost in the hundreds of millions of yuan. And meeting the AEC-Q100, which is the main reference for MCU standards, some parts of it are too simple for Journey 5, such as the testing time for heating and pressurization must be up to thousands of hours, far exceeding the standard requirements; some parts are very difficult, such as using high-computing power chips to meet the MCU class vehicle-level integration success rate requirements. For chip companies, power consumption correspondingly leads to temperature reduction and reliability improvement, and power consumption affects the workload and cost of vehicle-level integrated design and verification.

“The process of truly reaching SOP (mass production) is not achieved overnight. Based on the experience accumulated from the complete mass production process of the two generations of Journey 2 and Journey 3 chips, we have the confidence to mass-produce Journey 5 in Q4.” Huang Chang stated in an interview. Just like the vast amount of know-how accumulated by automakers in the mass production of previous models, the million-level mass production experience of Horizon has also become its core production technology barrier.

The expensive and “rolling” autonomous driving chip market

Technology is only the basic threshold for the entry of autonomous driving chips. Advanced process autonomous driving AI chips require huge investments and a prosperous ecosystem to support their mass production, profit, and continuous iteration.Taking NVIDIA’s Orin as an example. Orin uses TSMC’s 7nm process and is priced at $320 per chip. According to data from semiconductor technology research group Semiengingeering, the development cost of a 7nm node chip is approximately $297 million. This means that to recover its R&D costs, at least 928,125 chips need to be sold. Using the current mainstream scheme of two Orin chips per car, nearly 470,000 new cars would be required, not to mention TSMC’s continuously increasing production costs.

However, as of now, L2+ level autonomous/intelligent driving models that can be supported by dozens of TOPS of computing power have a market penetration rate of only 23.2% in China (according to IDC data), which translates to 4.85 million cars per year (calculated based on China’s passenger car sales of 20.92 million in 2019).

However, there is not much time left for Orin to sell. Orin will only begin large-scale rollout in 2022, but NVIDIA has already released the next generation autonomous driving chip Atlan, which has a single chip performance of up to 1000TOPS and will be mass-produced and commercially available in 2025.

Horizon is even quicker. Although the mass-produced 128TOPS Journey 5 will only be available in Q4, Horizon’s latest plan is to launch the Journey 6 with 512TOPS next year, a full year ahead of its previous plan.

With high costs, limited market and tough competition, players who have entered the market are required to achieve large-scale production quickly.

Achieving Large-scale Production: Overlaying Generality with User-friendliness

How to achieve large-scale production quickly?

Horizon chooses to adopt an extremely open approach, working together with its hardware and software partners in the Tier2 positioning, to develop mass-producible hardware and algorithms, providing OEMs with highly diverse, flexible and customizable high-performance chip products for both advanced features and research and development.

Generic Hardware Solutions

According to the “Electric Vehicle Observer”, the main perception solutions and algorithms for autonomous/intelligent driving have begun to converge within the industry.

In the perception solutions, the number and layout of 11 external cameras for the car, as well as the layout of the millimeter-wave radar, have already established an industry-wide paradigm.

For algorithms, the most essential visual perception algorithms in the industry have all adopted the BEV architecture over the past year.

BEVFormer, pioneered by Tesla, is a 3D object detection solution for multi-view cameras that optimizes features in the bird’s-eye view perspective using Transformer and time-series models.The universal hardware solution for autonomous driving, which is applicable to different automakers, has the prerequisite for implementation as the technology and engineering solutions for perception hardware and algorithms trend towards integration.

Based on the Journey 5 platform, Horizon has developed the Matrix 5 series mass-production computing platform reference design. With different chip configurations, Matrix 5 can provide up to 512 TOPS of powerful AI computing power, satisfying the requirements for intelligent applications across the entire vehicle such as ADAS, autonomous driving, and intelligent cockpit.

Based on the Matrix 5 standard design, Horizon can provide flexible and scalable domain-controller reference designs and pre-validated camera module kits for partners, while also supporting seamless compatibility with Horizon’s software system and perception algorithm modules. Matrix 5 will significantly reduce the development, adaptation, and deployment costs for OEMs and ecosystem partners.

Currently, more than 10 companies, including Continental Group, Neusoft Reach, Luxshare Group, and Unigroup Spreadtrum & RDA, have joined hands with Horizon to launch domain-controller products based on the Matrix 5 reference design. In addition, companies like Ingenic Semiconductor, Kimma, and Tinzhou have become official independent design house (IDH) partners of Journey 5, where they develop platforms, solution products, and other products based on IC factory chips to provide a basis for the development and rapid launch of complete machine products.

User-friendly software ecosystem

Providing a universal hardware solution is just the beginning.

“We believe that the development and delivery efficiency of the current (onboard computing platform) industry is too low, which brings great difficulties and costs to automakers.” Horizon’s senior director of product planning and marketing for the intelligent driving product line, Lv Peng, told “Electric Vehicle Observer,” “We provide many software tools to help customers complete development and delivery more efficiently, while also making our toolchain more refined to win more customers for our chips.“Horizon, above the Journey series, has built an efficient, secure, and user-friendly software development platform for high-level autonomous driving applications, including an end-to-end software stack based on Journey 5. Horizon’s Tian Gong Kai Wu AI chip toolchain includes three core capabilities: model post-quantization, quantization training, and compilation optimization and deployment, providing developers with full-process support from model acquisition to application deployment. Additionally, the Eddie AI development platform can provide intelligent automotive AI developers with capabilities such as data annotation, training, optimization, deployment, management and performance analysis. This automatic driving cross-platform system can be used out of the box, meaning users do not need to build a complex system from scratch but can instead focus on core value accumulation.

In terms of efficiency improvements, Lv Peng gave an example, stating that through the use of Tian Gong Kai Wu, single-customer average support input is reduced by about 50%, and average operator development input is reduced by 30%.

These universal hardware and user-friendly software systems will bring more users to Horizon and Journey 5 and create high barriers, speeding up the countdown to automatic driving chip industry entry.

At the end of the interview, Huang Chang told the “Electric Vehicle Observer” that the reason why high computational power chips have entered the finals stage (with only a few players involved) is because the core elements of chip software and hardware system maturity, mass production ability, and ecological system decide it.

Behind this are numerous partners, multi-generational iterative processes, million-level mass production scale, and massive product attraction to the development and application ecology. First-mover advantages will continue to push up the barriers of maturity, mass production ability, and ecological system, creating a distance from later entrants. “The challenge for new players entering will be very great.”

This article is a translation by ChatGPT of a Chinese report from 42HOW. If you have any questions about it, please email bd@42how.com.